3D NAND中工艺结构是导致器件失效的重要因素之一,其中,选择性外延生长(SEG)的生长高度也是导致失效的一个重要参数。因此,提出了一种新的关于SEG高度引起器件失效的模型、失效概率的计算方法,并由此计算预测每百万缺陷数(DPPM)。该算...3D NAND中工艺结构是导致器件失效的重要因素之一,其中,选择性外延生长(SEG)的生长高度也是导致失效的一个重要参数。因此,提出了一种新的关于SEG高度引起器件失效的模型、失效概率的计算方法,并由此计算预测每百万缺陷数(DPPM)。该算法涉及多种数学模型如泊松分布、正态分布等,同时对3D NAND中不同层次的失效概率进行计算。根据该算法可以得到DPPM与SEG高度的关系,并对SEG高度最优值、DPPM对不同区域的SEG高度的敏感性进行了研究。展开更多
In this paper, we investigate an Al2O3/HfSiO stack as the blocking layer of a metal-oxide-nitride-oxide-silicon- type （MONOS） memory capacitor. Compared with a memory capacitor with a single HfSiO layer as the block...In this paper, we investigate an Al2O3/HfSiO stack as the blocking layer of a metal-oxide-nitride-oxide-silicon- type （MONOS） memory capacitor. Compared with a memory capacitor with a single HfSiO layer as the blocking layer or an Al2O3/HfO2 stack as the blocking layer, the sample with the Al2O3/HfSiO stack as the blocking layer shows high program/erase （P/E） speed and good data retention characteristics. These improved performances can be explained by energy band engineering. The experimental results demonstrate that the memory device with an Al2O3/HfSiO stack as the blocking layer has great potential for further high-performance nonvolatile memory applications.展开更多
In this paper the endurance characteristics and trap generation are investigated to study the effects of different postdeposition anneals （PDAs） on the integrity of an Al2O3/Si3N4/SiOz/Si memory gate stack. The flat...In this paper the endurance characteristics and trap generation are investigated to study the effects of different postdeposition anneals （PDAs） on the integrity of an Al2O3/Si3N4/SiOz/Si memory gate stack. The flat-band voltage （Vfb） turnarounds are observed in both the programmed and erased states of the N2-PDA device. In contrast, this turnaround is observed only in the erased state of the O2-PDA device. The Vfb in the programmed state of the O2-PDA device keeps increasing with increasing program/erase （P/E） cycles. Through the analyses of endurance characteristics and the low voltage round-trip current transients, it is concluded that in both kinds of device there are an unknown type of pre-existing characteristic deep traps and P/E stress-induced positive oxide charges. In the O2-PDA device two extra types of trap are also found： the pre-existing border traps and the P/E stress-induced negative traps. Based on these four types of defects we can explain the endurance characteristics of two kinds of device. The switching property of pre-existing characteristic deep traps is also discussed.展开更多
With the merits of a simple process and a short fabrication period, the capacitor structure provides a convenient way to evaluate memory characteristics of charge trap memory devices. However, the slow minority carrie...With the merits of a simple process and a short fabrication period, the capacitor structure provides a convenient way to evaluate memory characteristics of charge trap memory devices. However, the slow minority carrier generation in a capacitor often makes an underestimation of the program/erase speed. In this paper, illumination around a memory capacitor is proposed to enhance the generation of minority carriers so that an accurate measurement of the program/erase speed can be achieved. From the dependence of the inversion capacitance on frequency, a time constant is extracted to quantitatively characterize the formation of the inversion layer. Experimental results show that under a high enough illumination, this time constant is greatly reduced and the measured minority carrier-related program/erase speed is in agreement with the reported value in a transistor structure.展开更多
Kelvin probe force microscopy （KFM） technology is applied to investigate the charge storage and loss characteristics of the HfAlO charge trapping layer with various AI contents. The experimental results demonstrate ...Kelvin probe force microscopy （KFM） technology is applied to investigate the charge storage and loss characteristics of the HfAlO charge trapping layer with various AI contents. The experimental results demonstrate that with the increase of AI contents in the HfAIO trapping layer, trap density significantly increases. Improvement of data retention characteristic is also observed. Comparing the vertical charge loss and lateral charge spreading of the HfAIO trapping layers, the former plays a major role in the charge loss mechanism. Variable temperature KFM measurement results show that the extracted effective electron trap energy level increases with increasing AI contents in HfAIO trapping layer, which is in accordance with the charge loss characteristics.展开更多
基金supported partially by the National Basic Research Program of China (Grant No. 2010CB934204)the National Natural Science Foundation of China (Grant No. 60825403)+1 种基金the Director’s Fund of Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS)the National Science and Technology Major Project of China (Grant No. 2009ZX02023-005)
文摘In this paper, we investigate an Al2O3/HfSiO stack as the blocking layer of a metal-oxide-nitride-oxide-silicon- type （MONOS） memory capacitor. Compared with a memory capacitor with a single HfSiO layer as the blocking layer or an Al2O3/HfO2 stack as the blocking layer, the sample with the Al2O3/HfSiO stack as the blocking layer shows high program/erase （P/E） speed and good data retention characteristics. These improved performances can be explained by energy band engineering. The experimental results demonstrate that the memory device with an Al2O3/HfSiO stack as the blocking layer has great potential for further high-performance nonvolatile memory applications.
基金Project supported in part by the National Basic Research Program of China(Grant Nos.2010CB934200 and 2011CBA00600)the National Natural Science Foundation of China(Grant Nos.61176073 and 61176080)the Director’s Fund of the Institute of Microelectronics,Chinese Academy of Sciences
文摘In this paper the endurance characteristics and trap generation are investigated to study the effects of different postdeposition anneals （PDAs） on the integrity of an Al2O3/Si3N4/SiOz/Si memory gate stack. The flat-band voltage （Vfb） turnarounds are observed in both the programmed and erased states of the N2-PDA device. In contrast, this turnaround is observed only in the erased state of the O2-PDA device. The Vfb in the programmed state of the O2-PDA device keeps increasing with increasing program/erase （P/E） cycles. Through the analyses of endurance characteristics and the low voltage round-trip current transients, it is concluded that in both kinds of device there are an unknown type of pre-existing characteristic deep traps and P/E stress-induced positive oxide charges. In the O2-PDA device two extra types of trap are also found： the pre-existing border traps and the P/E stress-induced negative traps. Based on these four types of defects we can explain the endurance characteristics of two kinds of device. The switching property of pre-existing characteristic deep traps is also discussed.
基金Project supported by the National Basic Research Program of China (Grant Nos. 2010CB934200 and 2011CBA00600)the National Natural Science Foundation of China (Grant Nos. 7360825403, 61176080, and 61176073)the National Science and Technology Major Project of China (Grant No. 2009ZX02023-005)
文摘With the merits of a simple process and a short fabrication period, the capacitor structure provides a convenient way to evaluate memory characteristics of charge trap memory devices. However, the slow minority carrier generation in a capacitor often makes an underestimation of the program/erase speed. In this paper, illumination around a memory capacitor is proposed to enhance the generation of minority carriers so that an accurate measurement of the program/erase speed can be achieved. From the dependence of the inversion capacitance on frequency, a time constant is extracted to quantitatively characterize the formation of the inversion layer. Experimental results show that under a high enough illumination, this time constant is greatly reduced and the measured minority carrier-related program/erase speed is in agreement with the reported value in a transistor structure.
基金Supported by the National Basic Research Program of China under Grant Nos 2010CB934200 and 2011CBA00600, the National Natural Science Foundation of China under Grant Nos 61176073 and 60825403, and the Director＇s Fund of Institutes of Microelectronics of Chinese Academy of Sciences.
文摘Kelvin probe force microscopy （KFM） technology is applied to investigate the charge storage and loss characteristics of the HfAlO charge trapping layer with various AI contents. The experimental results demonstrate that with the increase of AI contents in the HfAIO trapping layer, trap density significantly increases. Improvement of data retention characteristic is also observed. Comparing the vertical charge loss and lateral charge spreading of the HfAIO trapping layers, the former plays a major role in the charge loss mechanism. Variable temperature KFM measurement results show that the extracted effective electron trap energy level increases with increasing AI contents in HfAIO trapping layer, which is in accordance with the charge loss characteristics.
