In this paper, an analytical model for the vertical electric field distribution and optimization of a high voltage-reduced bulk field（REBULF） lateral double-diffused metal–oxide-semiconductor（LDMOS） transistor is...In this paper, an analytical model for the vertical electric field distribution and optimization of a high voltage-reduced bulk field（REBULF） lateral double-diffused metal–oxide-semiconductor（LDMOS） transistor is presented. The dependences of the breakdown voltage on the buried n-layer depth, thickness, and doping concentration are discussed in detail.The REBULF criterion and the optimal vertical electric field distribution condition are derived on the basis of the optimization of the electric field distribution. The breakdown voltage of the REBULF LDMOS transistor is always higher than that of a single reduced surface field（RESURF） LDMOS transistor, and both analytical and numerical results show that it is better to make a thick n-layer buried deep into the p-substrate.展开更多
A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on t...A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.展开更多
An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench（HK TG VDMOS） is proposed in this paper.The HK TG VDMOS features a hi...An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench（HK TG VDMOS） is proposed in this paper.The HK TG VDMOS features a high-k（HK） trench below the trench gate.Firstly,the extended HK trench not only causes an assistant depletion of the n-drift region,but also optimizes the electric field,which therefore reduces Ron,sp and increases the breakdown voltage（BV）.Secondly,the extended HK trench weakens the sensitivity of BV to the n-drift doping concentration.Thirdly,compared with the superjunction（SJ） vertical double-diffused metal-oxide semiconductor（VDMOS）,the new device is simplified in fabrication by etching and filling the extended trench.The HK TG VDMOS with BV = 172 V and Ron,sp = 0.85 mΩ·cm2 is obtained by simulation;its Ron,sp is reduced by 67% and 40% and its BV is increased by about 15% and 5%,in comparison with those of the conventional trench gate VDMOS（TG VDMOS） and conventional superjunction trench gate VDMOS（SJ TG CDMOS）.展开更多
A novel low specific on-resistance （Ron,sp） silicon-on-insulator （SO1） p-channel lateral double-diffused metal-oxide semiconductor （pLDMOS） compatible with high voltage （HV） n-channel LDMOS （nLDMOS） is propo...A novel low specific on-resistance （Ron,sp） silicon-on-insulator （SO1） p-channel lateral double-diffused metal-oxide semiconductor （pLDMOS） compatible with high voltage （HV） n-channel LDMOS （nLDMOS） is proposed. The pLDMOS is built in the N-type SO1 layer with a buried P-type layer acting as a current conduction path in the on-state （BP SOl pLD- MOS）. Its superior compatibility with the HV nLDMOS and low voltage （LV） complementary metal-oxide semiconductor （CMOS） circuitry which are formed on the N-SOl layer can be obtained. In the off-state the P-buried layer built in the NSOI layer causes multiple depletion and electric field reshaping, leading to an enhanced （reduced） surface field （RESURF） effect. The proposed BP SO1 pLDMOS achieves not only an improved breakdown voltage （BV） but also a significantly reduced Ron,sp. The BV of the BP SO1 pLDMOS increases to 319 V from 215 V of the conventional SO1 pLDMOS at the same half cell pitch of 25 μm, and Ron,sp decreases from 157 mΩ.cm2 to 55 mΩ.cm2. Compared with the PW SO1 pLDMOS, the BP SO1 pLDMOS also reduces the Ron,sp by 34% with almost the same BV.展开更多
A silicon-on-insulator （SOI） high performance lateral double-diffusion metal oxide semiconductor （LDMOS） on a compound buried layer （CBL） with a step buried oxide （SBO CBL SOI） is proposed. The step buried oxi...A silicon-on-insulator （SOI） high performance lateral double-diffusion metal oxide semiconductor （LDMOS） on a compound buried layer （CBL） with a step buried oxide （SBO CBL SOI） is proposed. The step buried oxide locates holes in the top interface of the upper buried oxide （UBO） layer. Furthermore, holes with high density are collected in the interface between the polysilicon layer and the lower buried oxide （LBO） layer. Consequently, the electric fields in both the thin LBO and the thick UBO are enhanced by these holes, leading to an improved breakdown voltage. The breakdown voltage of the SBO CBL SOI LDMOS increases to 847 V from the 477 V of a conventional SOI with the same thicknesses of SOI layer and the buried oxide layer. Moreover, SBO CBL SOI can also reduce the self-heating effect.展开更多
基金Project supported by the Scientific Research Fund of Education Department of Sichuan Province,China(Grant No.14ZB0132)the Key Project of Xihua University,China(Grant No.z1323318)
文摘In this paper, an analytical model for the vertical electric field distribution and optimization of a high voltage-reduced bulk field（REBULF） lateral double-diffused metal–oxide-semiconductor（LDMOS） transistor is presented. The dependences of the breakdown voltage on the buried n-layer depth, thickness, and doping concentration are discussed in detail.The REBULF criterion and the optimal vertical electric field distribution condition are derived on the basis of the optimization of the electric field distribution. The breakdown voltage of the REBULF LDMOS transistor is always higher than that of a single reduced surface field（RESURF） LDMOS transistor, and both analytical and numerical results show that it is better to make a thick n-layer buried deep into the p-substrate.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 61176069 and 60976060)the National Key Laboratory of Analogue Integrated Circuit, China (Grant No. 9140C090304110C0905)
文摘A new analytical model for the surface electric field distribution and breakdown voltage of the silicon oil insulator （SOI） trench lateral double-diffused metal-oxide-semiconductor （LDMOS） is presented. Based on the two-dimensional Laplace solution and Poisson solution, the model considers the influence of structure parameters such as the doping concentration of the drift region, and the depth and width of the trench on the surface electric field. Further, a simple analytical expression of the breakdown voltage is obtained, which offers an effective way to gain an optimal high voltage. All the analytical results are in good agreement with the simulation results.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 60806025 and 61176069 )the Program for New Century Excellent Talents in University of Ministry of Education of China (Grant No. NCET-11-0062)
文摘An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench（HK TG VDMOS） is proposed in this paper.The HK TG VDMOS features a high-k（HK） trench below the trench gate.Firstly,the extended HK trench not only causes an assistant depletion of the n-drift region,but also optimizes the electric field,which therefore reduces Ron,sp and increases the breakdown voltage（BV）.Secondly,the extended HK trench weakens the sensitivity of BV to the n-drift doping concentration.Thirdly,compared with the superjunction（SJ） vertical double-diffused metal-oxide semiconductor（VDMOS）,the new device is simplified in fabrication by etching and filling the extended trench.The HK TG VDMOS with BV = 172 V and Ron,sp = 0.85 mΩ·cm2 is obtained by simulation;its Ron,sp is reduced by 67% and 40% and its BV is increased by about 15% and 5%,in comparison with those of the conventional trench gate VDMOS（TG VDMOS） and conventional superjunction trench gate VDMOS（SJ TG CDMOS）.
基金supported by the National Natural Science Foundation of China (Grant No. 61176069)the State Key Laboratory Science Fund of Electronic Thin Films and Integrated Devices of China (Grant No. CXJJ201004)the National Key Laboratory Science Fund of Analog Integrated Circuit,China (Grant No. 9140C090304110C0905)
文摘A novel low specific on-resistance （Ron,sp） silicon-on-insulator （SO1） p-channel lateral double-diffused metal-oxide semiconductor （pLDMOS） compatible with high voltage （HV） n-channel LDMOS （nLDMOS） is proposed. The pLDMOS is built in the N-type SO1 layer with a buried P-type layer acting as a current conduction path in the on-state （BP SOl pLD- MOS）. Its superior compatibility with the HV nLDMOS and low voltage （LV） complementary metal-oxide semiconductor （CMOS） circuitry which are formed on the N-SOl layer can be obtained. In the off-state the P-buried layer built in the NSOI layer causes multiple depletion and electric field reshaping, leading to an enhanced （reduced） surface field （RESURF） effect. The proposed BP SO1 pLDMOS achieves not only an improved breakdown voltage （BV） but also a significantly reduced Ron,sp. The BV of the BP SO1 pLDMOS increases to 319 V from 215 V of the conventional SO1 pLDMOS at the same half cell pitch of 25 μm, and Ron,sp decreases from 157 mΩ.cm2 to 55 mΩ.cm2. Compared with the PW SO1 pLDMOS, the BP SO1 pLDMOS also reduces the Ron,sp by 34% with almost the same BV.
基金Project supported by the National Natural Science Foundation of China (Grant Nos.60806025 and 60976060)in part by the State Key Laboratory of Electronic Thin Films and Integrated Devices,China (Grant No.CXJJ201004)
文摘A silicon-on-insulator （SOI） high performance lateral double-diffusion metal oxide semiconductor （LDMOS） on a compound buried layer （CBL） with a step buried oxide （SBO CBL SOI） is proposed. The step buried oxide locates holes in the top interface of the upper buried oxide （UBO） layer. Furthermore, holes with high density are collected in the interface between the polysilicon layer and the lower buried oxide （LBO） layer. Consequently, the electric fields in both the thin LBO and the thick UBO are enhanced by these holes, leading to an improved breakdown voltage. The breakdown voltage of the SBO CBL SOI LDMOS increases to 847 V from the 477 V of a conventional SOI with the same thicknesses of SOI layer and the buried oxide layer. Moreover, SBO CBL SOI can also reduce the self-heating effect.
