3D NAND中工艺结构是导致器件失效的重要因素之一,其中,选择性外延生长(SEG)的生长高度也是导致失效的一个重要参数。因此,提出了一种新的关于SEG高度引起器件失效的模型、失效概率的计算方法,并由此计算预测每百万缺陷数(DPPM)。该算...3D NAND中工艺结构是导致器件失效的重要因素之一,其中,选择性外延生长(SEG)的生长高度也是导致失效的一个重要参数。因此,提出了一种新的关于SEG高度引起器件失效的模型、失效概率的计算方法,并由此计算预测每百万缺陷数(DPPM)。该算法涉及多种数学模型如泊松分布、正态分布等,同时对3D NAND中不同层次的失效概率进行计算。根据该算法可以得到DPPM与SEG高度的关系,并对SEG高度最优值、DPPM对不同区域的SEG高度的敏感性进行了研究。展开更多
This paper investigates gate current through ultra-thin gate oxide of nano-scale metal oxide semiconductor field effect transistors （MOSFETs）, using two-dimensional （2D） full-band self-consistent ensemble Montc Ca...This paper investigates gate current through ultra-thin gate oxide of nano-scale metal oxide semiconductor field effect transistors （MOSFETs）, using two-dimensional （2D） full-band self-consistent ensemble Montc Carlo method based on solving quantum Boltzmann equation. Direct tunnelling, Fowler-Nordheim tunnelling and thermionic emission currents have been taken into account for the calculation of total gate current. The 2D effect on the gate current is investigated by including the details of the energy distribution for electron tunnelling through the barrier. In order to investigate the properties of nano scale MOSFETs, it is necessary to simulate gate tunnelling current in 2D including non-equilibrium transport.展开更多
Interface roughness strongly influences the performance of germanium metal-organic-semiconductor field effect transistors （MOSFETs）. In this paper, a 2D full-band Monte Carlo simulator is used to study the impact of...Interface roughness strongly influences the performance of germanium metal-organic-semiconductor field effect transistors （MOSFETs）. In this paper, a 2D full-band Monte Carlo simulator is used to study the impact of interface roughness scattering on electron and hole transport properties in long- and short- channel Ge MOSFETs inversion layers. The carrier effective mobility in the channel of Ge MOSFETs and the in non-equilibriurn transport properties are investigated. Results show that both electron and hole mobility are strongly influenced by interface roughness scattering. The output curves for 50 nm channel-length double gate n and p Ge MOSFET show that the drive currents of n- and p-Ge MOSFETs have significant improvement compared with that of Si n- and p-MOSFETs with smooth interface between channel and gate dielectric. The 82% and 96% drive current enhancement are obtained for the n- and p-MOSFETs with the completely smooth interface. However, the enhancement decreases sharply with the increase of interface roughness. With the very rough interface, the drive currents of Ge MOSFETs are even less than that of Si MOSFETs. Moreover, the significant velocity overshoot also has been found in Ge MOSFETs.展开更多
基金Project supported by the National Key Basic Research Program （Grant No CB302705） and the National Natural Science Foundation of China （Grant No 90307006）.
文摘This paper investigates gate current through ultra-thin gate oxide of nano-scale metal oxide semiconductor field effect transistors （MOSFETs）, using two-dimensional （2D） full-band self-consistent ensemble Montc Carlo method based on solving quantum Boltzmann equation. Direct tunnelling, Fowler-Nordheim tunnelling and thermionic emission currents have been taken into account for the calculation of total gate current. The 2D effect on the gate current is investigated by including the details of the energy distribution for electron tunnelling through the barrier. In order to investigate the properties of nano scale MOSFETs, it is necessary to simulate gate tunnelling current in 2D including non-equilibrium transport.
基金Project supported by the National Natural Science Foundation of China (Grant No. 60606013)the National Basic Research Program of China (Grant No. 2006CB302705)
文摘Interface roughness strongly influences the performance of germanium metal-organic-semiconductor field effect transistors （MOSFETs）. In this paper, a 2D full-band Monte Carlo simulator is used to study the impact of interface roughness scattering on electron and hole transport properties in long- and short- channel Ge MOSFETs inversion layers. The carrier effective mobility in the channel of Ge MOSFETs and the in non-equilibriurn transport properties are investigated. Results show that both electron and hole mobility are strongly influenced by interface roughness scattering. The output curves for 50 nm channel-length double gate n and p Ge MOSFET show that the drive currents of n- and p-Ge MOSFETs have significant improvement compared with that of Si n- and p-MOSFETs with smooth interface between channel and gate dielectric. The 82% and 96% drive current enhancement are obtained for the n- and p-MOSFETs with the completely smooth interface. However, the enhancement decreases sharply with the increase of interface roughness. With the very rough interface, the drive currents of Ge MOSFETs are even less than that of Si MOSFETs. Moreover, the significant velocity overshoot also has been found in Ge MOSFETs.
